Digital-to-analog converter



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MJ x E@ E Jp wy/H MH 91% B Klee W. J.UREN ETAL DIGITAL-TO-ANALOGCONVERTER Original Filed Feb. 28, 1961 United States Patent O 10 Claims.(Cl. S40- 347) This application is a continuation of our pendingapplication, Serial No. 92,234, filed February 28, 1961, now forfeited.

This invention pertains to a bistable relay circuit particularly adaptedfor use in systems for converting a coded group of digital signalsrepresenting a number into an analog signal, the amplitude of which isproportional to the number and is retained until another coded group ofdigital signals representing a ditierent number is received forconversion.

ln numerous applications, especially in industrial process controlapplications, it is desirable to compute or otherwise provide controlsignals in digital form, particularly when several independent andaccurate control signals are to be repeatedly provided under specifiedconditions. Each group oi digital control signals is converted into ananalog signal and continuously applied to a load until a different groupis computed or otherwise provided.

A typical digital-to-analog converter is provided with a plurality ofcurrent generators, one generator for each denominational orderrepresented by a digital signal oi the number to be converted to producea current having an amplitude proportional to its order, and a likenumber of control switches each responsive to an associated digitalsignal order for connecting a corresponding current generator to acurrent adder. Thus, one channel consisting of a control switch and acurrent generator is connected to the current adder for each digitalsignal of a group representing a number. For instance, a converter for afour-digit binary number is provided with four channels. The digitalsignals are assigned the decimal values 23, 22, 21, and 20 according totheir respective order in the binary number.

The current gener-ators are designed to produce currents havingamplitudes proportional to the values of the digit orders of a codedgroup of digital signals with which they are associated. Accordingly,the full scale analog signal output or" a four-digit binary numberconverter is fifteen units and can be varied only by increments of V15of its full scale output. Smaller increments, and therefore largerbinary numbers, `are required for many applications such as nine-digitbinary numbers representing decimal numbers from O to 511 which may beconverted into analog signals that vary by increments of -,ll oi thefull scale output or ten-digit binary numbers representing decimalnumbers from 0 to 1023 which may be converted into analog signals thatvary by 1/1023 of the full scale output. Digital computers are generallydesigned to provide numbers having twenty binary digits or more, butproviding more digits in order to allow for changing the analog signaloutput by smaller increments requires adding more channels to theconverter which may be very expensive if the cost of a single channel ishigh. The cost of expanding the scale of a digital-to-analog converteris further increased by the cost of the larger static register l'llPatented May 18, 1965 ice required to store the binary number while itis being converted.

Unless the static register is disconnected from the converter while anew binary number is being entered, the analog control signaltransmitted by the converter will iuctuate radically and cause thetransition period between analog signals to be increased. If the staticregister is disconnected from the converter While a new binary number isbeing entered, it is customary to provide a memory device in eachchannel of the converter to store the digits of the previous numberuntil the new number has been entered, which further adds to the cost ofa digital-toanalog converter.

Another desired characteristic of digital-to-analog converters employedin industrial process control systems is that a common register beemployed to distribute binary numbers to a plurality of converters,either at random or in a cyclic manner. In order to accomplish that,each converter must be provided with some memory, such as a group ofbuffer flip-flops, to store a binary number until a new number isdistributed through the common register; but to provide a group ofbuffer Hip-flops for each converter would be almost as expensive as toprovide a separate distributing register for each converter.

A relay is commonly employed to implement the switch required in eachchannel of a converter to connect an associated current generator to thecommon current adder. When a relay is employed for that purpose, asecond transfer contact may be provided to hold the relay energized andthereby provide a memory for the associated digital signal. However, theprovision of a second transter contact for each relay is also expensive,particularly When mercury-wetted relays must be employed to provideextremely good reliability over a long period of operation.

Accordingly, an object of the invention is to provide an improved andinexpensive digital-to-analog converting system.

Another object of the invention is to provide an inexpensive bistablerelay circuit which may be particularly adapted for use in adigital-to-analog converter system.

These and other objects are realized in one embodiment of the inventionby providing a plurality of channels, one for .each digit of a number tobe converted into an analog signal, each channel comprising a bistablerelay circuit 4responsive to an associated digital signal assigned adifferent order of value to effectively connect a weighted currentsource to an analog summing circuit. Each weighted current sourceincludes a resistor connected to a common summing amplifier or circuitand has a resistance that is proper-tional to the order of theassociated digital signal. When a digital signal is momentarily appliedto the bistable relay circuit of a given channel, a relay is energized,thereby causing its transfer contact to be switched from a iirst contactconnected to a first source of potential to a second contact connectedto a second source of potential. As the transfer contact switches fromthe first contact to the second, the current to the summing amplifier orcircuit through a weighted resistor is interrupted and the weightedresistor is reconnected from the summingl amplifier or circuit to asource of reference potential which is ground, thereby altering theanalog signal transmitted trom the adder to a load by a discrete amountwhich is proportional to the order of the digital input signal to thebistable relay circuit.

The bistable relay circuit comprises one relay and a unidirectionalcurrent-conducting device provide-d to connect the transfer contact ofthe energized relay to the control input terminal of the relay coil sothat as the transfer contact switches from a first contact to a second,a potential is applied to the coil to provide a holding current afterthe input digital signal, having a value zero in the present embodiment,passes. ln that manner, the second contact of the reiay is employed in anovel manner to provide an analog conversion of a digital signal and toprovide a bistable relay circuit to store the digital signal beingconverted.

When a different digital signal representing a digit having a weightedvalue is to be entered in a given channel for conversion following adigit having a value of zero, the new digital signal momentarily appliesa voltage to the input terminal of the coil at the same potential as thepotential source connected at the secc-nd terminal of the coil, therebyeffectively providing a short circuit having virtually no impedance:across the relay coil in order that it may be de-energized. Thetransfer contact returns to the first contact when the relay isdeenergized due to a spring bias. In that manner, the bistable relaycircuits in a group of channels may be employed to convert a group ofdigital signals representing a number into an analog signal and to alsostore the digital code configuration of the number until a new number isto be converted, thereby lmaking it possible to employ one register todistribute binary numbers to a plurality of converters.

Other objects and inventions will become apparent from the followingdescription with reference to the drawings in which FIG. l is aschematic diagram of a novel bistable relay circuit and FIG. 2 is aschematic diagram of an improved digital-to-analog converting systemernploying the novel bistable relay circuit schematically illustrated inFIG. 1.

In describing the operation of the novel bistable relay circuit 1schematically illustrated in FIG. l, it is assumed that a manual switch2 is connected to a first terminal of the coil of a relay K, the firstterminal of the coil being the input terminal of the bistable relaycircuit 1, and that the relay is initially de-energized while the switch2 is in a neutral position as shown. With the relay K de-energized, adiode 3 is reverse biased by -24 volts applied to its anode through varesistor 4 and a transfer contact Ka of the relay K. An output terminal5 of the bistable relay circuit 1 connected to the transfer contact Kais then at -24 Volts as long as the relay K remains de-energized.

When the switch 2 is momentarily closed on a contact 6 connected to asource of +24 volts, the relay is energized and the transfer contact isthereby moved from a first contact 7 connected to a source of +24 voltsto a second contact 8 connected to a source of +48 volts. The diode 3 isthen forward biased so that after the switch 2 is returned to itsneutral position, it will conduct current from the source of +48 voltsto la source of referrence potential to which a second terminal of therelay is connected. For the purpose of this description it is assumedthat the relay K is designed to operate with a twenty-four voltenergizing signal so that if a +48 volt source is connected to thesecond contact 8, the resistance of the conducting diode 3 and resistor4 in series should be approximately equal to the resistance of the relaycoil. The holding current provided through the diode 3 establishes asecond stable condition for the relay circuit 1, a condition in whichthe output terminal 5 is maintained at +48 volts.

To reset the relay circuit i to its first stable condition, the manualswitch 2 is momentarily closed on a contact 9 connected to the source ofreference potential. The relay K is thereby de-energized and thetransfer contact Ka is returned to the first contact 7 under theinfluence of a biasing spring S which may be an integral CIK part of thetransfer contact Ka. After the relay K is dre-energized, the diode 3 isagain reverse biased and remains reverse biased after the switch 2 isreturned to its neutral position due to the -24 volts applied to itsanode through the transfer contact Ka.

The manner in which this novel bistable relay circuit is employed toprovide a new and improved digital-toanalog converting system isillustrated in FIG. 2. A coded group of digital signals is received inparallel and tempararily stored in a static register 10 until it istransferred to a converter C11 or C12 which stores and converts thedigital signals until a new group of digital signals is transferred toit :from the register 10.

The static register 1t) provided to transmit a group of coded digitalsignals in parallel to` a digital-to-analog converter is represented inFIG. 2 to be of a type described by Iacob Millman and Herbert Taub atpages 412 and 413 in Pulse and Digital Circuits, published byMcGraw-Hill Book Company in 1958, but it should be understood thatregisters of other configurations may be employed, such as shiftregisters employing logic gates for serial transfer between stages. Forconvenience, a four-stage shift register has been illustrated but asmany stages may be provided as are required by the application orf thisinvention, one stage for each digital signal of a group representing anumber that is to be converted.

A group of digital signals applied serially to an input terminal l5 isshifted into the register 10 in response to shift pulses which areapplied to a terminal 16 until the least significant digit is registeredin the flip-liep 14 of the last stage. The most significant digit isthen registered in the flip-flop 11 of the first stage. For the purposeof illustrating an embodiment of the invention, it is assumed that thecode of the group of digital signals is the standard (8-4-2-1) binarycode, but other codes may obviously be employed, such as the reflected(Gray) binary code or some binary-decimal code with only minor changesin the design of the weighting resistors employed.

A group of AND-gates 17 to 20 are enabled to transmit the binary numberin parallel from the register 10 to a group of amplifiers 2l to 24 whilea Hip-flop 25 is set. Each of the amplifiers 21 to 24 may be agrounded-emitter NPN transistor switch of the type illustrated byMillman and Taub, supra, at page 588 and is employed so that when itsassociated one Of the AND-gates 17 to 20 is enabled by coincidentpositive signals, it is conducting at saturation and its output terminalis clamped to ground. Under those circumstances, an associated one of agroup of relays K1 to K4 is de-energized and its transfer contact isthereby placed in the position shown.

Each of the AND-gates i7' to 20 may be a diode coincident circuit of thetype illustrated by Millman and Taub, supra, at page 398. Each of theHip-flops, such as the iiiptiop 25, may be of the type illustrated byMillman and Taub, supra, at page 595 and so employed that its trueoutput terminal is at a positive potential only when it is set. When thehip-flop 25 is set, only those AND-gates associated with iiip-*lops 11to 14 of stages in the register 1t? which are set to store a binarydigit 1 produce a positive signal to enable associated amplifiers totransmit a 0 volt signal and de-energize their associated relays. Forinstance, when a binary digit l is stored in the least significantposition, the fiip-iiop 14 is set and the AND- gate 20 is enabled uponthe fiip-iiop Z5 also being set. The positive output signal from theenabled AND-gate 20 switches the amplifier 24 on and de-energizes therelay K4 so that its transfer contact is placed in the position shown.

As a further example, assume that a binary digit 0 is stored in the most-significant position of the register so that the flip-flop 11 transmitsa 0 volt signal. Under those circumstances, the AND-gate 17 is notenabled when the Hip-flop 25 is set and the associated amplifier 2liremains cut off. As long as the amplifier 21 remains cut off, itsassociated relay K1 remains energized and its adsense transfer contactK11 is connected to ground by a currentlirniting resistor 26.Accordingly, an energized relay transmits a digital signal of 0 voltrepresenting a binary digit 0 and a de-energized relay transmits adigital signal of -48 volts representing a binary digit 1.

After a group of digital signals representing a binary number has beenstored in the register 1d and the relays K1 to K4 have been energized inaccordance with the digital coniiguration of the binary number, thenumber may be converted into an analog signal by a selected one of aplurality of converters C11 and C12. That is accomplished by enablingone of a plurality of associated AND-gates 27 and 28. Assuming that thedigital-toanalog converter C11 is to be selected, a positive selectingsignal is applied to an input terminal SC11 of the AND- gate 27 and alip-flop 31B is set. The enabled AND-gate 27 transmits a positive signalto cause a relay K11 to be energized and its transfer contacts Km, toK11d to be closed.

The transfer contacts K111, to K11d connect the transfer contacts K1a toKm to respective bistable relay circuits 41 to 44, each of which issimilar to the bistable relay circuit described with reference to FlG.1, the only differences being the addition of weighting resistors, suchas resistors 45 and 46 in the bistable relay circuit 41, and a change inthe applied voltages. ln FlG. 1 the reference potential connected to thesecond terminal of the relay K is illustrated as ground, whereas thecorresponding reference potential in the bistable relay circuit 41 is-48 volts. All other voltages applied to the bistable relay circuit 41are approximately forty-eight volts more negative than the correspondingvoltages applied to the bistable relay circuit of FIG. l. Thecurrent-limiting resistor associated with each relay K1 to K4, such asthe resistor 26, is selected to have a resistance approximately equal toone-third of the resistance of the relay of the associated one of thebistable relay circuits 41 to 44, such as the relay K11, in order thatits resistance and the resistance of the two transfer contacts whichconnect it to an input terminal of a bistable relay circuit willfunction to provide a voltage of approximately -24 volts when thosetransfer contacts are closed, the deviation from -24 volts permissiblebeing a function only of the construction of the relays employed in thebistable relay circuits.

Assuming that the group of digital signals stored in the registerrepresents a binary number 0111, only the relay K1 is energized when therelay K11 is selectively energized and only the bistable relay circuit41 is energized. The energizing current for the relay circuit 41 issupplied from ground through a series circuit consisting of the resistor26, the transfer contact Km and the transfer contact K11a.

After the appropriate bistable relay circuits 41 to 44 have beenenergized, the relay K11 is de-energized by resetting the flip-flop 30.The energized relay circuits, such as the relay circuit 41 inthe presentexample, remain energized due to the novel manner in which a holdingcurrent is provided as described with reference to FiG. l.

While the bistable relay circuit 41 is energized, its transfer contactK411, connects the weighting resistor 45 to ground, thereby providingzero current to a load 53 in response to a binary digit zero. Since theremaining bistable relay circuits 42 to 44 remain de-energized for thedigital-to-analog conversion of the binary number 0111, the transfercontact in each connects a source of -72 volts to the load through pairsof resistors 47, 4S; 49, 5tlg and 51, 52. Each resistor of a pairconnected in series by an associated transfer contact is weighted ininverse proportion to the order of the binary digit with which it isassociated in order that the pair in series may provide an inverselyweighted current to the load 53, the amplitude of which is directlyproportional to the binary digit being converted. The following table isa specific eX- ample of one set of weighted resistors for converting afour-digit binary number:

series.

The load circuit is illustrated as a summing amplifier 53 having anegative feedback resistor 54 the resistance of which is substantiallyequal to the sum of the resistances of the resistors 51 and 52 which inthe foregoing table is 200x103 ohms. The sum of the resistances of theresistors 49 and Sti is substantially equal to 1/2 of the resistance ofthe resistor 54 and the proportions for the resistors in the bistablecircuits 41 and 42 and 1/s and 1A, respectively, as in the exampleillustrated by the foregoing table. This manner of weighting theresistors for each order of a binary number, or a number expressed inany other digital code, is standard practice in designingdigital-to-analog converters.

Each relay employed in the bistable relay circuits 41 to 44 ispreferably of the mercury-wetted contact type, as are the relays K1 toK1, which makes a connection between its` transfer contact and itssecond contact before it break-s a connection between its transfercontact and its first contact. For that reason, the weighted resistanceassociated with a given bistable relay circuit is divided, a fractionbeing connected between the source of -72 volts and the first Contact tolimit current just as the resistor 26 limits current for the relay K1;otherwise, the transfer contact would provide a short circuit betweenthe source of -72 volts and ground while the bistable circuit connectionis being transferred from one contact to the other.

The summing amplifier 53 may be of a conventional type generallydescribed by G. A. Korn and T. M. Korn at pages 13 and 14 of ElectronicAnalog Computers, published by McGraw-Hill Book Company in 1952. Theoutput signal provided at an output terminal 55 is a voltage signalproportional to the sum of the weighted input currents. A summingcircuit may also be employed as described at pages l2 and 13 by Korn andKorn, supra, to obtain a voltage signal which is proportional to the sumof the weighted input currents and the load may form a part of thesumming circuit as illustrated by the load 56 connected at a junction 57to a plurality of bistable relay circuits 61 to 64 in the converter C12.Since the sum of all currents flowing to the junction 57 must be zero,the current through the load is equal to the sum of the weightedcurrents provided by the bistable relay circuits.

After the bistable relay circuits 41 to 44 have been energized inaccordance with the configuration of a group of digital signalsrepresenting a binary number and the relay K11 has been de-energized, asdescribed hereinbefore, the register 1t) may be employed to receiveanother group of digital signals for transfer to either the converterC11 or the converter C12. The latter may be selected by energizing therelay K12 through the AND-gate SC12 in a manner similar to thatdescribed for the selection of the converter C11.

When a new number is to be converted by a previously selected converter,a binary digit 0 in a given order energizes its associated bistablerelay circuit, as described hereinbefore, if not already energized, anda binary digit 1 de-energizes its associated bistable relay circuit. Forinstance, the binary number 1000 transferred to the converter C11following the binary number 0111 would cause the bistable relay circuits42, 43 and 44 to be energized,

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just as the bistable relay circuit 4l had been previously energized, andthe bistable relay circuit il to be deenergized due to a 48 volt signalapplied to its input terminal through the transfer contacts K12L and Km.

Four control signals are required in the present embodiment of animproved digital-to-analog converting system to transfer a group ofdigital signals from the register l@ to a selected digital-to-analogconverter as described. The rst signal is a pulse applied to an inputterminal OD1 of the Hip-flop 25 to reset it and thereby disable theAND-gates 17 to 2.0 while a new group of digital signals are beingtransferred into the register 10. Thereafter, a pulse is applied to aninput terminal OD2 of the flip-flop 25 to set it and enable theAND-gates 17 to 20 to energize the respective relays K1 to K4 inaccordance with the configuration of the digital signals in the registerl0. After allowing sufficient time for the energized relays K1 to K4 tosettle, a pulse is applied to an input terminal OD3 of the liip-flop Siito set it and thereby enable a selected one of the AND-gates 27 and 28to transfer the digital signals from the relays K1 to K4 to the bistablerelay circuits of the selected converter. Sutiicient time is allowed forthe relay K11 or K12 to energize and for the bistable relay circuits ofthe corresponding converter C11 or C12 to be set to appropriate stableconditions before the flip-flop Sti is reset by a pulse applied to aninput terminal CD4.

The sequencing pulses applied to the control input terminals OD1 to CD4may be derived from a sequence control pulse distributor of the dataprocessing or industrial control system with which the digital-to-analogconverter is associated. A typical sequence control pulse distributorconsists of a gated counter driven by synchronizing clock pulses. Forthe present embodiment, the clock pulses may be approximately fourmicrosecond pulses and the gating logic of the counter so arranged thatthe control pulses distributed from different stages to the controlinput terminals OD1 to CD4 allow suflicient time for the relays toenergize and de-energize, as required by the characteristics of therelays employed.

The improved and inexpensive digital-to-analog convertin-g system justdescribed utilizes the novel bistable relay circuit illustrated inFIG. 1. Other bistable relay circuits of the type described by Keisteret al., at page 29 0f The Design of Switching Circuits (BellLaboratories Series), D. Van Nostrand Co. (1951), lack a unidirectionalcurrent-conducting device in the latching circuit so that a givenchannel of a digital-to-analog converter utilizing such a prior artbistable relay circuit cannot be readily adapted to provide an outputsignal which may assume two voltage levels because the second or backcontact, if present, must be left open; otherwise, the relay would beprovided with energizing current for both positions of the transfercontact. It is often desirable to be able to provide an output signalthat may assume two voltage levels, as in the improved digital-to-analogconverting system of 2 in which the second voltage level is thereference potential (ground). Moreover, there is an advantage in beingable to switch an input terminal of a resistor from a source ofpotential to ground in a digital attenuating network in that the seriesimpedance between the source of potential and the load may be altered inresponse to the input digital signals while the output admittance of thenetwork is maintained substantially constant.

While the principles of the invention have now been made clear in anillustrative embodiment, there will be immediately obvious to thoseskilled in the art many modifications in structure, arrangement,proportions, the elements, materials, and components, used in thepractice of the invention, and otherwise, which are particularly adaptedfor specific environments and operating requirements, without departingfrom those principles. The appended claims are therefore intended tocover and embrace any such modifications, within the limits only of thetrue spirit and scope of the invention.

What is claimed is:

1. A bistable relay circuit comprising:

a relay having a coil with first and second terminals at opposite endsthereof, a spring biased transfer contact and a relay contact away fromwhich said transfer contact is held by its spring bias while said coilis de-energized;

an output terminal;

means for coupling said output terminal to said transfer contact;

a source of reference potential;

means for coupling said source of reference potential to said firstterminal of said coil;

a source of potential of a given polarity with reference to saidreference potential;

means for coupling said source of potential of a given polarity to saidrelay contact;

means for momentarily applying a voltage signal of said given polarityto said second terminal of said coil, whereby said coil is energized tocause said transfer contact to close upon said relay contact;

a unidirectional current-conducting means connecting said transfercontact to said second terminal of said coil, said unidirectionalcurrent-conducting means being so poled as to conduct current betweensaid transfer contact and said relay contact when said coil isenergized, whereby said coil is maintained energized until selectivelyde-energized;

and means for selectively de-energizing said coil.

2. A bistable relay circuit, comprising:

a relay having a coil and a transfer contact operatively associated withfirst and second contacts, said transfer Contact being spring-biased tomake an electrical connection with said first contact when said coil isde-energized;

means for connecting a iirst terminal of said coil to a source ofreference potential;

means for connecting to said first contact a first source of potentialof a given polarity with respect to said reference potential;

means for connecting to said second contact a second source of potentialof a polarity with respect to said reference potential opposite to thatof said given polarity;

an output terminal;

means for coupling said transfer contact to said output terminal;

means for momentarily translating a first voltage signal of a polarityopposite that of said given polarity to a second terminal of said coil,said first voltage signal having suflicient amplitude to cause said coilto be energized;

means for electrically coupling said transfer contact to said secondterminal of said coil, said means including a unidirectionalcurrent-conducting device so poled as to permit current to flow throughit to said coil when said coil is energized by said first signal wherebysaid coil remains energized after said first signal is translated and toprevent current from flowing through it to said coil when said coil isdeener gized, whereby said coil remains de-energized after a digitalsignal at said reference potential is translated to said second terminalof said coil.

3. A bistable relay circuit, comprising:

a relay having a coil and a transfer contact operatively associated withfirst and second contacts, said transfer contact being spring-biased tomake an electrical connection with said first contact when said coil isde-energized;

means for connecting a first terminal of said coil to a source ofreference potential;

means for connecting to said rst contact a first source of potential ofa given polarity with respect to said reference potential;

means for connecting to said second contact a second source of potentialof a polarity with respect to said reference potential opposite to thatof said given polarity;

an output terminal;

means for coupling said transfer contact to said output terminal;

means for momentarily translating a first voltage signal of a polarityopposite that of said given polarity to a second terminal of said coil,said first voltage signal having suiiicient amplitude to cause said coilto be energized;

means for electrically coupling said transfer contact to said secondterminal of said coil, said means including a unidirectionalcurrent-conducting device so poled as to permit current to ilow throughit to said coil when said coil is energized by said iirst signal wherebysaid coil remains energized after said first signal is translated;

and means for momentarily translating a second voltage signal to saidsecond terminal of said coil, said second Voltage signal being at asubstantially zero potential with respect to said source of referencepotional whereby said coil is caused to be de-energized.

4. In a system for applying a current to a load, the amplitude of whichis specified by a group of coded digital signals, each digital signal insaid group being assigned a ditierent order of value and beingassociated with a different one of a plurality of bistable relaycircuits, a given digital signal being operatively associated with acorresponding relay circuit in order that said corresponding relaycircuit may be energized when said given digital signal is a voltagesignal at a first potential of a given polarity with respect to areference potential and be desenergized when said given digital signalis a voltage signal at said reference potential, an output terminal ofeach bistable relay circuit being connected to said load, each of saidbistable relay circuits comprising:

a relay having a coil and a transfer contact operatively associated withfirst and second contacts, said transfer contact being spring-biased tomake an electrical connection with said first contact when said coil isdeenergized;

means for connecting a first terminal of said coil to a source ofreference potential;

means for connecting to said first contact a first source of potentialof a polarity opposite to said given polarity with respect to saidreference potential;

means for connecting to said second contact a second source of potentialof said given polarity;

a resistor for coupling said transfer contact to said output terminal;

means for momentarily translating a digital signal to a second terminalof said coil;

means for electrically coupling said transfer contact t said secondterminal of said coil, said means including a unidirectionalcurrent-conducting device so poled as to permit current to flow throughit to said coil when said coil is energized, whereby said coil remainsenergized after a digital signal at said first potential is translatedto said second terminal of said coil, and to prevent current fromliowing through it to said coil when said coil is de-enerized, wherebysaid coil remains de-energized after a digital signal at said referencepotential is translated to said second terminal of said coil.

5. ln a switching system for applying a current to a load the amplitudeof which is specified by a group of coded digital signals, each digitalsignal in said group being assigned a different order of value and beingassociated with a different one of a plurality of bistable relaycircuits as defined in claim 4, wherein the resistance of said resistorin each of said given bistable relay circuits is proportional to theorder of the digital signal with which it is operatively associated.

6. In a switching system for applying a current to a load the amplitudeof which is specified by a group of coded digital signals, each digitalsignal in said group being assigned a different order of value and beingassociated with a different one of a plurality of bistable relaycircuits as defined in claim 5, wherein each of said bistable relays isconnected to a switching means for momentarily translating a group ofdigital signals in parallel to said bistable relay circuits whereby agroup of digital signals representing a number will cause each of saidbistable switches to be placed in one of two stable states ofenergization according to the digital value of its asociated digitalsignal in order to produce a current proportional to said number.

7. In a switching system for applying a current to a load the amplitudeof which is specified by a group of coded digital signals, each digitalsignal in said group being assigned a diiierent order of value and beingassociated with a different one of a plurality of bistable relaycircuits as defined in claim 6 wherein each of said bistable relays isconnected to said switching means, and wherein said switching means iscoupled to a register, and including a means for altering the group ofdigital signals iu said register while said switching means is notmomentarily translating a group of digital signals.

8. in a digital-to-analog converting system having a register forselectively distributing a group of digital signals to one of aplurality of digital-to-analog converters and a means for couplingoutput signals from said register in parallel to a selecteddigital-to-analog converter, each digital-to-analog converter having aplurality of bistable relay circuits, each bistable relay circuit beingoperatively associated with a given digital signal of a group of digitalsignals, each of which is assigned a different order of value, saidoperative association being such that each corresponding relay circuitmay be energized when its associated digital signal is a voltage signalat a rst potential of a given polarity with respect to a referencepotential and be de-energized when said associated digital signal is avoltage signal at said reference potential, an output terminal of eachbistable relay circuit being connected to a load, each of said bistable-relay circuits comprising:

a relay having a coil and a transfer contact operatively associated withfirst and second contacts, said transfer contact being spring-biased tomake an electrical connection with said first contact when said coil isde-energized;

means for connecting a iirst terminal of said coil to a source ofreference potential;

means for connecting to said first contact a iirst source of potentialof a polarity opposite to said given polarity with respect to saidreference potential;

means for connecting to said second contact a second source of potentialof said given polarity;

a resistor for coupling said transfer contact to said output terminal;

means for momentarily translating a digital signal to a second terminalof said coil; means for electrically coupling said transfer contact tosaid second terminal of said coil, said means including a unidirectionalcurrent-conducting device so poled as to permit current to flow throughit to said coil when said coil is energized, whereby said coil remainsenergized after a digital signal at said first potential is translatedto said second terminal of said coil, and to prevent current from iowingthrough it to said coil when said coil is de-cnergized, whereby saidcoil remains deenergized, whereby said coil remains energized aftertential is translated to said second terminal of said coil.

9. In a digital-to-analog converting system the combination as dened inclaim 8, wherein the resistance of said resistor of said given bistablerelay circuit is proi. it l. 2 portional to the order of the digitalsignal with which Reerenees Cited bythe Examiner it iS OPEHVS'IYISSOC'led. I 10. In a dxg1tal-t0-analog converting system thecornbination as dened in claim 9, further including a means 848709 8/58Jansky 1540*347 for altering the group of digital signals in saidregister 5 2,970,309 1/61 Towles 340-347 While said switching means isnot momentarily translating a group of digital signals, MALCOLM A.MORRISON, Primary Examiner.

8. IN A DIGITAL-TO-ANALOG CONVERTING SYSTEM HAVING A REGISTER FORSELECTIVELY DISTRIBUTING A GROUP OF DIGITAL SIGNALS TO ONE OF APLURALITY OF DIGITAL-TO-ANALOG CONVERTERS AND A MEANS FOR COUPLINGOUTPUT SIGNALS FROM SAID REGISTER IN PARALLEL TO A SELECTEDDIGITAL-TO-ANALOG CONVERTER, EACH DIGITAL-TO-ANALOG CONVERTER HAVING APLURALITY OF BISTABLE RELAY CIRCUITS, EACH BISTABLE RELAY CIRCUIT BEINGOPERATIVELY ASSOCIATED WITH A GIVEN DIGITAL SIGNAL OF A GROUP OF DIGITALSIGNALS, EACH OF WHICH IS ASSIGNED A DIFFERENT ORDER OF VALUE, SAIDOPERATIVE ASSOCIATION BEING SUCH THAT EACH CORRESPONDING RELAY CIRCUITMAY BE ENERGIZED WHEN ITS ASSOCIATED DIGITAL SIGNAL IS A VOLTAGE SIGNALAT A FIRST POTENTIAL OF A GIVEN POLARITY WITH RESPECT TO A REFERENCEPOTENTIAL AND BE DE-ENERGIZED WHEN SAID ASSOCIATED DIGITAL SIGNAL IS AVOLTAGE SIGNAL AT SAID REFERENCE POTENTIAL, AN OUTPUT TERMINAL OF EACHBISTABLE RELAY CIRCUIT BEING CONNECTED TO A LOAD, EACH OF SAID BISTABLERELAY CIRCUITS COMPRISING: A RELAY HAVING A COIL AND A TRANSFER CONTACTOPERATIVELY ASSOCIATED WITH FIRST AND SECOND CONTACTS, SAID TRANSFORCONTACT BEING SPRING-BIASED TO MAKE AN ELECTRICAL CONNECTION WITH SAIDFIRST CONTACT WHEN SAID COIL IS DE-ENERGIZED; MEANS FOR CONNECTING AFIRST TERMINAL OF SAID COIL TO A SOURCE OF REFERENCE POTENTIAL; MEANSFOR CONNECTING TO SAID FIRST CONTACT A FIRST SOURCE OF POTENTIAL OF APOLARITY OPPOSITE TO SAID GIVEN POLARITY WITH RESPECT TO SAID REFERENCEPOTENTIAL;